Device Control Register

This article or section has multiple issues. Please help improve the article or discuss these issues on the talk page. It contains too much jargon and may need simplification or further explanation. Tagged since July 2008. It may be confusing or unclear for some readers. Tagged since July 2008. It may be too technical for a general audience. Please help make it more accessible. Tagged since July 2008. It is in need of attention from an expert on the subject. WikiProject Computer Science or the Computer Science Portal may be able to help recruit one. It needs to be expanded. Tagged since July 2008. It may need to be wikified to meet Wikipedia's quality standards.Tagged since July 2008.

A device control register (DCR) is an on-chip register that exists architecturally and physically outside the main compute core, and therefore are not specified by the ISA and processor programming manuals. The manuals typically define the DCR space, but make no claims regarding which facility or device corresponds to which part of the space.

DCRs are a mechanism provided by the main compute core to configure on-chip facilities, such as the operation of on-chip buses and certain processor core behavior, as well as the operation of certain peripheral devices. DCRs are typically accessed through the use of privileged instructions, such as the mtdcr and mfdcr instructions in embedded PowerPC chips.

For example, the compute cores of Blue Gene supercomputer expose DCRs for access to JTAG functions ^[1].

References

1. ^ Blue Gene/L compute chip: Control, test, and bring-up infrastructure

External links

Device Control Register Bus 3.5 Architecture Specifications

This computer-related article is a stub. You can help Wikipedia by expanding it.